Abstract
This paper details the development and extensive silicon-level verification of a 128 × 128 Readout Integrated Circuit (ROIC) tailored for uncooled Short-Wave Infrared (SWIR) imaging cameras, which operate at a 2.6 μm wavelength. We conducted silicon-level verification of the developed ROIC, enabling a detailed analysis of various performance aspects. This evaluation will help us identify potential explore for further improvements, significantly advancing SWIR imaging camera systems. Our goal is to gain a deeper understanding of performance dynamics to enhance operational efficiency and image quality. The prototype ROIC was manufactured using a 0.18-μm 1P6M CMOS process, featuring an effective pixel resolution of 128 (H) × 128 (V), specifically designed for InGaAs FPAs. The prototype consumes 42.25 mW of power and achieves a frame rate of 390 frames per second. The fabricated chip show that the Noise level is 72.65 μVrms and Pixel-FPN is 21 LSBrms.
| Translated title of the contribution | Design of a 128x128 ROIC Array for Development of Uncooled 2.6 μm-wavelength SWIR Imaging Camera |
|---|---|
| Original language | English |
| Pages (from-to) | 11-16 |
| Number of pages | 6 |
| Journal | Journal of Integrated Circuits and Systems |
| Volume | 10 |
| Issue number | 2 |
| DOIs | |
| State | Published - 2024 |