몰드물성 종류 및 칩 크기 변화에 따른 웨이퍼 레벨 SIP에서의 열 피로 해석

Translated title of the contribution: Thermal Fatigue Analysis of Wafer Level Embedded SiP by Changing Mold Compounds and Chip Sizes

Research output: Contribution to journalArticlepeer-review

Abstract

This paper describes in detail the life prediction models and simulations of thermal fatigue under different mold compounds and chip sizes for wafer-level embedded SiP. Three-dimensional finite element models are built to simulate the viscoplastic behaviors for various mold compounds and chip sizes. In particular, the bonding parts between a mold and silicon nitride (Si3N4) are carefully modeled, and the strain distributions are studied. Three different chip sizes are used, and the effects of the mold compounds are observed. Through the numerical studies, it is found that type-C, which has a relatively lower Young's modulus and higher CTE, has a better fatigue life than the other mold compounds. In addition, the $4{\times}4$ chip has a shorter life than the $6{\times}6$ and $8{\times}8$ chips.
Translated title of the contributionThermal Fatigue Analysis of Wafer Level Embedded SiP by Changing Mold Compounds and Chip Sizes
Original languageKorean
Pages (from-to)504-508
Number of pages5
Journal한국생산제조시스템학회지
Volume22
Issue number3
DOIs
StatePublished - Jun 2013

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