선형 블록 오류정정코드의 구조와 원리에 대한 연구

This paper introduces various linear block error correction code and compares performances of the correction circuits. As the risk of errors due to power noise has increased, ECC(: Error Correction Code) has been introduced to prevent the bit error. There are two representative ECC structures which are SEC-DED(: Single Error Correction Double Error Detection) and SEC-DED-DAEC(: Double Adjacent Error Correction). In this research, According to simulation results, the SEC-DED circuit has advantages of small area and short delay time as compared to SEC-DED-DAEC circuits. In case of SED-DED-DAEC, there is no big difference between Dutta’s and Pedro’s in performance point of view. Therefore, Pedro’s code is more efficient than Dutta’s code since the correction rate of Pedro’s code is higher than that of Dutta’s code