Abstract
This paper presents a design of an FPGA-based hardware for real-time high-resolution color image warping. Image warping is an image processing algorithm applying 2D coordinate transformation to an input image. For real-time processing of image warping, real-time performance and accuracy are required in the following 3 problems, such as, computation of coordinate transformation, interpolation of pixel data, and fast image buffer memory structure. In this paper, real-time performance is guaranteed by the computationally efficient CFA color image warping, image data cache algorithm using offline cache scheduling and cache memory division, and a parallel operation and pipeline structure considering dependencies in operations and timing requirements. The implemented system is applied to some experiments using Full HD color image inputs, and the results are presented in comparison with the results of PC software to show the validity of the designed system.
Translated title of the contribution | FPGA-based Hardware Design for Real-time High-resolution Color Image Warping |
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Original language | Korean |
Pages (from-to) | 55-64 |
Number of pages | 10 |
Journal | 전자공학회논문지 |
Volume | 58 |
Issue number | 2 |
DOIs | |
State | Published - Feb 2021 |