점하중시험법에 의한 반도체 기판용 실리콘 웨이퍼의 파괴강도 평가

Translated title of the contribution: Evaluation of Fracture Strength of Silicon Wafer for Semiconductor Substrate by Point Load Test Method

Research output: Contribution to journalArticlepeer-review

Abstract

Purpose: The purpose of this study was to investigate the effect of grinding process and thickness on the fracture strength of silicon die used for semiconductor substrate.
Method: Silicon wafers with different thickness from 200 µm to 50 µm were prepared by chemical mechanical polishing (CMP) and dicing before grinding (DBG) process, respectively. Fracture load was measured by point load test for 50 silicon dies per each wafer.
Results: Fracture strength at the center area was lower than that at the edge area of the wafer fabricated by DBG process, while random distribution of the fracture strength was observed for the CMPed wafer. Average fracture strength of DBGed specimens was higher than that of the CMPed ones for the same thickness of wafer.
Conclusion: DBG process can be more helpful for lowering fracture probability during the semiconductor fabrication process than CMP process.
Translated title of the contributionEvaluation of Fracture Strength of Silicon Wafer for Semiconductor Substrate by Point Load Test Method
Original languageKorean
Pages (from-to)26-31
Number of pages6
Journal신뢰성 응용연구
Volume16
Issue number1
StatePublished - Mar 2016

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