280.2/309.2 GHz, 18.2/9.3 dB Gain, 1.48/1.4 dB Gain-per-mW, 3-Stage Amplifiers in 65nm CMOS Adopting Double-embedded-Gmax-core

Byeonghun Yun, Dae Woong Park, Chan Gyu Choi, Ho Jin Song, Sang Gug Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

8 Scopus citations

Abstract

This paper reports a sub-THz high-gain amplifier design technique which is more flexible and suitable for performance optimization based on a double-embedded-Gmax-core. The double-embedded-Gmax-cort is implemented by adopting an additional linear, lossless, and reciprocal (LLR) network that satisfies the Gmax-condition (Y21/Y12=-Gmax) on to an N-stage pseudo-Gmax-cores where each stage satisfies the stability factor ki= and phase delay of 2m π/N. Implemented in a 65nm CMOS, the three-stage 280.2 and 309.2 GHz amplifiers achieve power gains of 18.2 and 9.3 dB and gain-per-mW of 1.48 and 1.4 dB/mW, respectively.

Original languageEnglish
Title of host publication2022 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages91-94
Number of pages4
ISBN (Electronic)9781665496117
DOIs
StatePublished - 2022
Event2022 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2022 - Denver, United States
Duration: 19 Jun 202221 Jun 2022

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume2022-June
ISSN (Print)1529-2517

Conference

Conference2022 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2022
Country/TerritoryUnited States
CityDenver
Period19/06/2221/06/22

Keywords

  • amplifiers
  • CMOS
  • H-band
  • high gain
  • Maximum achievable gain
  • sub-THz

Fingerprint

Dive into the research topics of '280.2/309.2 GHz, 18.2/9.3 dB Gain, 1.48/1.4 dB Gain-per-mW, 3-Stage Amplifiers in 65nm CMOS Adopting Double-embedded-Gmax-core'. Together they form a unique fingerprint.

Cite this