A 280-/300-GHz Three-Stage Amplifiers in 65-nm CMOS with 12-/9-dB Gain and 1.6/1.4% PAE while Dissipating 17.9 mW

This letter reports the design of terahertz amplifiers using the concept of maximum achievable gain ( $G-{\mathrm {max}})$ of a transistor embedded in a linear, lossless, reciprocal network. Implemented in a 65-nm CMOS, by adopting the optimized $G-{\mathrm {max}}$ -core, 280- and 300-GHz amplifiers achieve peak gain of 12 and 9 dB, peak power-added efficiency (PAE) of 1.6% and 1.4%, and gain per stage of 4 and 3 dB, respectively, while dissipating 17.9 mW, which is the best performance up to date in terms of operating frequency, gain per stage, and PAE in CMOS process.