A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS

Dzuhri Radityo Utomo; Dae Woong Park; Byeonghun Yun; Sang Gug Lee

doi:10.1109/VLSICircuits18222.2020.9162796

A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS

Dzuhri Radityo Utomo, Dae Woong Park, Byeonghun Yun, Sang Gug Lee

Dept. of Semiconductor Engineering

Korea Advanced Institute of Science and Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

This work proposes a push-push double feedback oscillator (DFBO) topology, which is able to reduce the parasitic capacitance of the transistor, and satisfy the condition for maximum power at fundamental (f_o) and 2^nd harmonic (2f_o) frequencies simultaneously, thus maximizing the oscillator output power. Oscillators adopting the proposed topology are implemented in a 65-nm CMOS, and the measurements show the maximum output powers of 5.0 and -3.9 dBm with maximum DC-to-RF efficiencies of 2.94 and 0.58 % at operating frequencies of 293 and 440 GHz, respectively.

Original language	English
Title of host publication	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728199429
DOIs	https://doi.org/10.1109/VLSICircuits18222.2020.9162796
State	Published - Jun 2020
Event	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States Duration: 16 Jun 2020 → 19 Jun 2020

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume	2020-June

Conference

Conference	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
Country/Territory	United States
City	Honolulu
Period	16/06/20 → 19/06/20

Keywords

CMOS
high-power
parasitic capacitance reduction
push-push oscillator
sub-THz source

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10.1109/VLSICircuits18222.2020.9162796

Cite this

Utomo, D. R., Park, D. W., Yun, B., & Lee, S. G. (2020). A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings Article 9162796 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSICircuits18222.2020.9162796

Utomo, Dzuhri Radityo ; Park, Dae Woong ; Yun, Byeonghun et al. / A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

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title = "A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 \% DC-to-RF Efficiency in 65 nm CMOS",

abstract = "This work proposes a push-push double feedback oscillator (DFBO) topology, which is able to reduce the parasitic capacitance of the transistor, and satisfy the condition for maximum power at fundamental (fo) and 2nd harmonic (2fo) frequencies simultaneously, thus maximizing the oscillator output power. Oscillators adopting the proposed topology are implemented in a 65-nm CMOS, and the measurements show the maximum output powers of 5.0 and -3.9 dBm with maximum DC-to-RF efficiencies of 2.94 and 0.58 \% at operating frequencies of 293 and 440 GHz, respectively.",

keywords = "CMOS, high-power, parasitic capacitance reduction, push-push oscillator, sub-THz source",

author = "Utomo, \{Dzuhri Radityo\} and Park, \{Dae Woong\} and Byeonghun Yun and Lee, \{Sang Gug\}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 ; Conference date: 16-06-2020 Through 19-06-2020",

year = "2020",

month = jun,

doi = "10.1109/VLSICircuits18222.2020.9162796",

language = "English",

series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Utomo, DR, Park, DW, Yun, B & Lee, SG 2020, A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. in 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings., 9162796, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, vol. 2020-June, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, United States, 16/06/20. https://doi.org/10.1109/VLSICircuits18222.2020.9162796

A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. / Utomo, Dzuhri Radityo; Park, Dae Woong; Yun, Byeonghun et al.
2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. 9162796 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This work proposes a push-push double feedback oscillator (DFBO) topology, which is able to reduce the parasitic capacitance of the transistor, and satisfy the condition for maximum power at fundamental (fo) and 2nd harmonic (2fo) frequencies simultaneously, thus maximizing the oscillator output power. Oscillators adopting the proposed topology are implemented in a 65-nm CMOS, and the measurements show the maximum output powers of 5.0 and -3.9 dBm with maximum DC-to-RF efficiencies of 2.94 and 0.58 % at operating frequencies of 293 and 440 GHz, respectively.

AB - This work proposes a push-push double feedback oscillator (DFBO) topology, which is able to reduce the parasitic capacitance of the transistor, and satisfy the condition for maximum power at fundamental (fo) and 2nd harmonic (2fo) frequencies simultaneously, thus maximizing the oscillator output power. Oscillators adopting the proposed topology are implemented in a 65-nm CMOS, and the measurements show the maximum output powers of 5.0 and -3.9 dBm with maximum DC-to-RF efficiencies of 2.94 and 0.58 % at operating frequencies of 293 and 440 GHz, respectively.

KW - CMOS

KW - high-power

KW - parasitic capacitance reduction

KW - push-push oscillator

KW - sub-THz source

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Utomo DR, Park DW, Yun B, Lee SG. A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2020. 9162796. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). doi: 10.1109/VLSICircuits18222.2020.9162796

A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS

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Keywords

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