TY - JOUR
T1 - A 32-KB standard CMOS antifuse one-time programmable ROM embedded in a 16-bit microcontroller
AU - Cha, Hyouk Kyu
AU - Yun, Ilhyun
AU - Kim, Jinbong
AU - So, Byepng Cheol
AU - Chun, Kanghyup
AU - Nam, Ilku
AU - Lee, Kwyro
PY - 2006/9
Y1 - 2006/9
N2 - A 32-KB standard CMOS antifuse one-time programmable (OTP) ROM embedded in a 16-bit microcontroller as its program memory is designed and implemented in 0.18-μm standard CMOS technology. The proposed 32-KB OTP ROM cell array consists of 4.2 μm2 three-transistor (3T) OTP cells where each cell utilizes a thin gate-oxide antifuse, a high-voltage blocking transistor, and an access transistor, which are all compatible with standard CMOS process. In order for high density implementation, the size of the 3T cell has been reduced by 80% in comparison to previous work. The fabricated total chip size, including 32-KB OTP ROM, which can be programmed via external I2C master device such as universal I2C serial EEPROM programmer, 16-bit microcontroller with 16-KB program SRAM and 8-KB data SRAM, peripheral circuits to interface other system building blocks, and bonding pads, is 9.9 mm 2. This paper describes the cell, design, and implementation of high-density CMOS OTP ROM, and shows its promising possibilities in embedded applications.
AB - A 32-KB standard CMOS antifuse one-time programmable (OTP) ROM embedded in a 16-bit microcontroller as its program memory is designed and implemented in 0.18-μm standard CMOS technology. The proposed 32-KB OTP ROM cell array consists of 4.2 μm2 three-transistor (3T) OTP cells where each cell utilizes a thin gate-oxide antifuse, a high-voltage blocking transistor, and an access transistor, which are all compatible with standard CMOS process. In order for high density implementation, the size of the 3T cell has been reduced by 80% in comparison to previous work. The fabricated total chip size, including 32-KB OTP ROM, which can be programmed via external I2C master device such as universal I2C serial EEPROM programmer, 16-bit microcontroller with 16-KB program SRAM and 8-KB data SRAM, peripheral circuits to interface other system building blocks, and bonding pads, is 9.9 mm 2. This paper describes the cell, design, and implementation of high-density CMOS OTP ROM, and shows its promising possibilities in embedded applications.
KW - CMOS antifuse
KW - CMOS OTP
KW - Embedded PROM
KW - Gate-oxide breakdown
KW - Microcontroller
KW - Nonvolatile memory
KW - OTP ROM
UR - http://www.scopus.com/inward/record.url?scp=33748358173&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2006.880603
DO - 10.1109/JSSC.2006.880603
M3 - Article
AN - SCOPUS:33748358173
SN - 0018-9200
VL - 41
SP - 2115
EP - 2124
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 9
M1 - 1683903
ER -