A 4-to-7GHz, 52.3dB SFDR, and 48K Noise Temperature Cryo-CMOS based Noise-Canceling Receiver for Superconducting Multi-Qubits Read-Out

Quantum computers (QCs) can perform certain computational problems exponentially faster than classical computers due to the superposition and entanglement properties of quantum bits (qubits). Among the various qubit technologies, superconducting qubits offer the fastest computational speed and are easy to fabricate, making them a strong candidate for large-scale QC systems with the potential to reduce both cost and complexity [1]. To execute practical quantum algorithms with real-time quantum error correction, thousands of qubits must be simultaneously controlled and read out much faster than the coherence time of the qubits (≪ ∼ 120 μ ~s). Current approaches require thousands of cables connecting the qubits to bulky room temperature (RT) equipment, which severely limits the scalability of control and readout electronics for QC systems with more than 103 qubits. To address this issue, the electronic interfaces must be placed in close proximity to the qubits, or ideally co-integrated and operated at similar cryogenic temperatures (CTs) with the qubits [1, 2]. This work proposes a 4 -to7 GHz single-chip fully integrated readout integrated circuit (ROIC) with 48 K noise temperature measured at 26 ~K, 253 MHz IF bandwidth (BW), and 52.3 dB spurious-free dynamic range (SFDR) for compatibility with superconducting multi-qubits read-out.