TY - GEN
T1 - A 56 Gb/s PAM-4 CDR Circuit Using Middle Transition Masking and Integrated Bit Decoding Schemes
AU - Kim, Seung Gyun
AU - Lee, Won Young
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - This paper presents a middle transition masking phase detector (MTM-PD) for a 56Gb/s pulse amplitude modulation-4 (PAM-4) quarter-rate clock and data recovery (CDR) circuit. The proposed MTM-PD identifies undesirable middle transitions based on Hamming distance and selectively masks phase updates to enhance input slew-rate tolerance. By integrating the data recovery path with the middle-transition masking path, the overall chip area and power consumption are reduced without degrading CDR locking performance. Compared to a conventional PAM-4 bang-bang phase detector (BBPD) with middle transition elimination block, the proposed MTM-PD achieves a power reduction of 7.5 % in the PD block. Simulation results demonstrate that the proposed MTM-CDR consumes 38.24 mW and achieves energy efficiency of 0.68pJ/b while recovering PAM-4 data.
AB - This paper presents a middle transition masking phase detector (MTM-PD) for a 56Gb/s pulse amplitude modulation-4 (PAM-4) quarter-rate clock and data recovery (CDR) circuit. The proposed MTM-PD identifies undesirable middle transitions based on Hamming distance and selectively masks phase updates to enhance input slew-rate tolerance. By integrating the data recovery path with the middle-transition masking path, the overall chip area and power consumption are reduced without degrading CDR locking performance. Compared to a conventional PAM-4 bang-bang phase detector (BBPD) with middle transition elimination block, the proposed MTM-PD achieves a power reduction of 7.5 % in the PD block. Simulation results demonstrate that the proposed MTM-CDR consumes 38.24 mW and achieves energy efficiency of 0.68pJ/b while recovering PAM-4 data.
KW - Clock and data recovery (CDR)
KW - hamming distance
KW - high-speed serial link
KW - middle-transition mask
KW - PAM-4 signaling
UR - https://www.scopus.com/pages/publications/105035385642
U2 - 10.1109/APCCAS67402.2025.11376806
DO - 10.1109/APCCAS67402.2025.11376806
M3 - Conference contribution
AN - SCOPUS:105035385642
T3 - Proceedings - 2025 21st IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2025
BT - Proceedings - 2025 21st IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 21st IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2025
Y2 - 12 October 2025 through 15 October 2025
ER -