TY - JOUR
T1 - A 60-GHz Polar Vector Modulator with Lookup Table-Based Calibration
AU - Sung, Eun Taek
AU - Wang, Seunghun
AU - Hong, Songcheol
N1 - Publisher Copyright:
© 2001-2012 IEEE.
PY - 2021/6
Y1 - 2021/6
N2 - A 60-GHz polar vector modulator with a lookup table (LUT)-based calibration for a variable gain active phase shifter is presented. It consists of an input buffer, an I/Q generator, a vector summing amplifier, and 6-bit phase/gain digital-to-analog converters (DACs). It is very difficult to obtain accurate gain and phase characteristics of a polar vector modulator due to circuit imperfections, such as I/Q imbalance, current mismatches of DACs, and impedance variations over polar vector states. Thus, calibrations are essential to have accurate gain and phase states. This letter introduces an LUT-based calibration method to map possible 213 states (5-bit gain and 8-bit phase) onto targeted polar states, which minimizes gain and phase errors drastically. The proposed phase shifter with a generated LUT shows an rms gain and phase errors of 0.13 dB and 0.8°, respectively, at the center frequency of 60 GHz. In addition, it has an rms gain and phase errors of <0.47 dB and <3.3° in a 9-GHz bandwidth of 55-64 GHz with 4-bit gain and 5-bit phase resolutions. It was fabricated using a 28-nm bulk CMOS process. The core area and power consumption are 0.41 mm2 and 15.4 mW, respectively.
AB - A 60-GHz polar vector modulator with a lookup table (LUT)-based calibration for a variable gain active phase shifter is presented. It consists of an input buffer, an I/Q generator, a vector summing amplifier, and 6-bit phase/gain digital-to-analog converters (DACs). It is very difficult to obtain accurate gain and phase characteristics of a polar vector modulator due to circuit imperfections, such as I/Q imbalance, current mismatches of DACs, and impedance variations over polar vector states. Thus, calibrations are essential to have accurate gain and phase states. This letter introduces an LUT-based calibration method to map possible 213 states (5-bit gain and 8-bit phase) onto targeted polar states, which minimizes gain and phase errors drastically. The proposed phase shifter with a generated LUT shows an rms gain and phase errors of 0.13 dB and 0.8°, respectively, at the center frequency of 60 GHz. In addition, it has an rms gain and phase errors of <0.47 dB and <3.3° in a 9-GHz bandwidth of 55-64 GHz with 4-bit gain and 5-bit phase resolutions. It was fabricated using a 28-nm bulk CMOS process. The core area and power consumption are 0.41 mm2 and 15.4 mW, respectively.
KW - Calibration
KW - CMOS
KW - lookup table (LUT)
KW - millimeter-wave (mm-wave)
KW - phase shifter
KW - V-band
KW - variable gain
UR - https://www.scopus.com/pages/publications/85104247198
U2 - 10.1109/LMWC.2021.3073178
DO - 10.1109/LMWC.2021.3073178
M3 - Article
AN - SCOPUS:85104247198
SN - 1531-1309
VL - 31
SP - 572
EP - 574
JO - IEEE Microwave and Wireless Components Letters
JF - IEEE Microwave and Wireless Components Letters
IS - 6
M1 - 9404221
ER -