A hardware implementation of EIA 709.1 control networking standard

Jeon Il Moon, Jung Sub Kim, Jong Bae Kim, Kye Young Lim, Byoung Wook Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a solution for the hardware implementation of EIA-709.1 Control Networking Protocol. It is the basic protocol of LonWorks systems that is widely used for the building system and the sensor system. The EIA 709.1 protocol has been implemented at the hardware level from physical layer to network layer to reduce the computing load on the CPU. VHSIC hardware description language (HDL) has been used for the EIA-709.1 protocol. Other layers have been implemented using C programs on Intel 8051 processor. The EIA-709.1 protocol has been implemented using field programmable gate array (FPGA) technology and the commercial feasibility of the proposed solution has been performed through the communication test using the Neuron Chip of EIA-709.1 protocol. The designed EIA709.1 core is usable as one of the intellectual properties (IPs) and it is applicable to design System-on-a-Chip (SoC) for various industrial controllers.

Original languageEnglish
Title of host publicationProceedings of the 16th IFAC World Congress, IFAC 2005
PublisherIFAC Secretariat
Pages31-36
Number of pages6
ISBN (Print)008045108X, 9780080451084
DOIs
StatePublished - 2005

Publication series

NameIFAC Proceedings Volumes (IFAC-PapersOnline)
Volume16
ISSN (Print)1474-6670

Keywords

  • EIA-709.1
  • Embedded systems
  • Fieldbus
  • Networks
  • Protocols

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