A Hardware Scheduler for Multicore Block Cipher Processor

Sang Muk Lee, Eun Nu Ri Ko, Seung Eun Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

In consequence of an increasing demand for high-performance system, multiprocessor architectures became trend and used in a variety of fields (e.g. PC, laptops, mobile devices and so on). Multi-core processor can get outstanding throughput with relatively lower operating frequency and power consumption. In order to obtain the maximum throughput in a multi-core structure, it is necessary to schedule assigning tasks to multiple cores. In this paper, we propose a hardware scheduler that is tailored for multicore block cipher and verify the feasibility of the scheduler using AES algorithm.

Original languageEnglish
Title of host publicationProceedings - 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2016
EditorsYiannis Cotronis, Masoud Daneshtalab, George Angelos Papadopoulos
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages750-754
Number of pages5
ISBN (Electronic)9781467387750
DOIs
StatePublished - 31 Mar 2016
Event24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2016 - Heraklion, Crete, Greece
Duration: 17 Feb 201619 Feb 2016

Publication series

NameProceedings - 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2016

Conference

Conference24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2016
Country/TerritoryGreece
CityHeraklion, Crete
Period17/02/1619/02/16

Keywords

  • Advanced Encryption Standard (AES)
  • Hardware Scheduler
  • Multicore Hardware Schdeuling
  • Multicore Processor
  • Network-on-Chip (NoC)

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