TY - GEN
T1 - A High-Performance Scheduling Algorithm for Mode Transition in PIM
AU - Lee, Seungyong
AU - Lee, Sanghyun
AU - Seo, Minseok
AU - Park, Chunmyung
AU - Lee, Hyuk Jae
AU - Shin, Woojae
AU - Kim, Hyun
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - Processing in memory (PIM) has emerged due to the lack of memory bandwidth. To add new commands in PIM, various architectures make use of memory modes. By changing the memory mode, memory can recognize PIM commands in existing system. However, this method would incur mode conflicts when the current mode of memory and the mode required by a request are different. Mode transition overhead caused by the mode conflict would be catastrophic in the environment where memory and PIM requests are randomly mixed. To resolve this problem, in this paper, we propose a scheduling algorithm named gather issue (GI). It reduces mode conflicts by gathering PIM requests in a queue and postponing until the number of PIM requests exceeds threshold. We evaluate it and other polices using inputs with varying memory/PIM ratios. GI achieves the most improvement in performance showing closer fairness to other polices.
AB - Processing in memory (PIM) has emerged due to the lack of memory bandwidth. To add new commands in PIM, various architectures make use of memory modes. By changing the memory mode, memory can recognize PIM commands in existing system. However, this method would incur mode conflicts when the current mode of memory and the mode required by a request are different. Mode transition overhead caused by the mode conflict would be catastrophic in the environment where memory and PIM requests are randomly mixed. To resolve this problem, in this paper, we propose a scheduling algorithm named gather issue (GI). It reduces mode conflicts by gathering PIM requests in a queue and postponing until the number of PIM requests exceeds threshold. We evaluate it and other polices using inputs with varying memory/PIM ratios. GI achieves the most improvement in performance showing closer fairness to other polices.
KW - DRAM
KW - Memory scheduling
KW - Processing in memory
UR - https://www.scopus.com/pages/publications/85123761333
U2 - 10.1109/ICCE-Asia53811.2021.9641988
DO - 10.1109/ICCE-Asia53811.2021.9641988
M3 - Conference contribution
AN - SCOPUS:85123761333
T3 - 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021
BT - 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021
Y2 - 1 November 2021 through 3 November 2021
ER -