@inproceedings{5fb5d905f9ef4ded8256abe6087421a2,
title = "A low-power, low-noise neural recording amplifier for implantable biomedical devices",
abstract = "This paper presents a low power and low noise neural amplifier IC for processing both action potential and local field potential signals in neural implant devices. Based on a capacitivefeedback topology, the core operational transconductance amplifier utilizes a two-stage structure with current buffer achieving wide bandwidth, large output swing, and small area. The proposed neural amplifier is designed using 0.18μm CMOS process and achieves 46 dB gain, a bandwidth of 0.9 Hz-13.8 kHz, and integrated input-referred noise of 5 μVrms in the range of 1 Hz to 10 kHz. The noise efficiency factor of the designed neural amplifier is 2.6 and consumes 2 μA of current from a 1.2 V supply with an area of 0.136 mm2.",
keywords = "Capacitive feedback, Neural amplifier, Neural recorder, Operational transconductance amplifier",
author = "Kim, \{Hyung Seok\} and Cha, \{Hyouk Kyu\}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th International SoC Design Conference, ISOCC 2016 ; Conference date: 23-10-2016 Through 26-10-2016",
year = "2016",
month = dec,
day = "27",
doi = "10.1109/ISOCC.2016.7799784",
language = "English",
series = "ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "275--276",
booktitle = "ISOCC 2016 - International SoC Design Conference",
}