A Reference Voltage Generator Using Level Tracking Scheme for Low-Swing PAM-3 Signaling

Seul Ki Han, Won Young Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes a reference voltage generation circuit for offset and mismatch compensation. The proposed circuit achieves a fast lock cycle by simultaneously generating two reference voltages used in the PAM-3 receiver. The measured energy efficiency of the receiver is 1.52pJ/bit.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2024, ISOCC 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages37-38
Number of pages2
ISBN (Electronic)9798350377088
DOIs
StatePublished - 2024
Event21st International System-on-Chip Design Conference, ISOCC 2024 - Sapporo, Japan
Duration: 19 Aug 202422 Aug 2024

Publication series

NameProceedings - International SoC Design Conference 2024, ISOCC 2024

Conference

Conference21st International System-on-Chip Design Conference, ISOCC 2024
Country/TerritoryJapan
CitySapporo
Period19/08/2422/08/24

Keywords

  • DAC(Digital-to-Analog Converter)
  • ISI(Inter-Symbol Interference)
  • PAM(Pulse Amplitude Modulation)
  • Reference voltage generation

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