TY - GEN
T1 - A Reference Voltage Generator Using Level Tracking Scheme for Low-Swing PAM-3 Signaling
AU - Han, Seul Ki
AU - Lee, Won Young
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This paper proposes a reference voltage generation circuit for offset and mismatch compensation. The proposed circuit achieves a fast lock cycle by simultaneously generating two reference voltages used in the PAM-3 receiver. The measured energy efficiency of the receiver is 1.52pJ/bit.
AB - This paper proposes a reference voltage generation circuit for offset and mismatch compensation. The proposed circuit achieves a fast lock cycle by simultaneously generating two reference voltages used in the PAM-3 receiver. The measured energy efficiency of the receiver is 1.52pJ/bit.
KW - DAC(Digital-to-Analog Converter)
KW - ISI(Inter-Symbol Interference)
KW - PAM(Pulse Amplitude Modulation)
KW - Reference voltage generation
UR - http://www.scopus.com/inward/record.url?scp=85213342192&partnerID=8YFLogxK
U2 - 10.1109/ISOCC62682.2024.10762560
DO - 10.1109/ISOCC62682.2024.10762560
M3 - Conference contribution
AN - SCOPUS:85213342192
T3 - Proceedings - International SoC Design Conference 2024, ISOCC 2024
SP - 37
EP - 38
BT - Proceedings - International SoC Design Conference 2024, ISOCC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 21st International System-on-Chip Design Conference, ISOCC 2024
Y2 - 19 August 2024 through 22 August 2024
ER -