A Self-aligned Process for Simultaneous Fabrication of Short Channel and Spacer in Semiconductor Devices

We have developed a process for the efficient implementation of short channel devices using a lift-off self-align structure, which simultaneously implements the gate stack(dielectric / electrode) and spacer. By utilizing the lift-off process in a semiconductor device structure with 2-D materials as the channel, we have experimentally verified the stable implementation of short channel lengths down to the level of 50 nm using AFM/SEM. Furthermore, through analysis of the drain current, we have confirmed the improvement in electrical characteristics by applying the self-align technique to structures with the same channel length. The proposed method in this study can offer efficient value in research activities such as device structure and property development in the field of device research, providing a more efficient and cost-saving process.