A simple novel method to reduce common mode voltage in space vector pulse width modulation driving three-phase inverter

Yongkeun Lee, Janghyeon Lee, Jangwook Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper proposes a simple novel method to eliminate maximum common mode voltage (CMV) occurred at unavoidable zero vector applied in space vector pulse width modulation (SVPWM) driving three-phase voltage source inverter (VSI). Instead of switch OFF upper or lower three IGBTs (ppp) or (nnn) for zero vector, our proposed method is to switch OFF all six IGBTs. It results in CMV being zero at zero vector switching from 1/2 v-dc.

Original languageEnglish
Title of host publicationInternational Conference on Electronics, Information and Communication, ICEIC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-4
Number of pages4
ISBN (Electronic)9781538647547
DOIs
StatePublished - 2 Apr 2018
Event17th International Conference on Electronics, Information and Communication, ICEIC 2018 - Honolulu, United States
Duration: 24 Jan 201827 Jan 2018

Publication series

NameInternational Conference on Electronics, Information and Communication, ICEIC 2018
Volume2018-January

Conference

Conference17th International Conference on Electronics, Information and Communication, ICEIC 2018
Country/TerritoryUnited States
CityHonolulu
Period24/01/1827/01/18

Keywords

  • AZSVPWM
  • CMV
  • DPWM
  • IGBT
  • SVPWM

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