TY - JOUR
T1 - A Sub-nW Single-Supply 32-kHz Sub-Harmonic Pulse Injection Crystal Oscillator
AU - Kim, Keun Mok
AU - Kim, Subin
AU - Choi, Kyung Sik
AU - Jung, Hyunki
AU - Ko, Jinho
AU - Lee, Sang Gug
N1 - Publisher Copyright:
© 1966-2012 IEEE.
PY - 2021/6
Y1 - 2021/6
N2 - An extremely low-power 32-kHz crystal oscillator (XO) based on a sub-harmonic pulse injection technique is presented. By injecting current pulses into the crystal at the sub-harmonic of the oscillation frequency, the power consumption of the proposed XO reduces with an increase in the order of sub-harmonic ( ${N}$ ). For the generation of sub-harmonic pulses with accurate timing, a 50%-duty-cycle-locked loop and a sub-harmonic peak-detection delay-locked loop are employed. A clock divider is also utilized to generate the sub-harmonic clock, which is required for the real-time clock as well. Implemented in a 55-nm CMOS technology with a triple well, the proposed XO, including a clock divider, dissipates 0.74 nW from a single 0.3-V supply for $N = 16$ and the chip occupies only 0.019 mm2.
AB - An extremely low-power 32-kHz crystal oscillator (XO) based on a sub-harmonic pulse injection technique is presented. By injecting current pulses into the crystal at the sub-harmonic of the oscillation frequency, the power consumption of the proposed XO reduces with an increase in the order of sub-harmonic ( ${N}$ ). For the generation of sub-harmonic pulses with accurate timing, a 50%-duty-cycle-locked loop and a sub-harmonic peak-detection delay-locked loop are employed. A clock divider is also utilized to generate the sub-harmonic clock, which is required for the real-time clock as well. Implemented in a 55-nm CMOS technology with a triple well, the proposed XO, including a clock divider, dissipates 0.74 nW from a single 0.3-V supply for $N = 16$ and the chip occupies only 0.019 mm2.
KW - Crystal oscillator (XO)
KW - delay-locked loop (DLL)
KW - duty-cycle-locked loop
KW - oscillator
KW - pulse injection
KW - real-time clock (RTC)
KW - sub-harmonic
KW - ultra-low-power (ULP)
UR - http://www.scopus.com/inward/record.url?scp=85107003336&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2020.3016021
DO - 10.1109/JSSC.2020.3016021
M3 - Article
AN - SCOPUS:85107003336
SN - 0018-9200
VL - 56
SP - 1849
EP - 1858
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 6
M1 - 9173539
ER -