@inproceedings{b9c7cba677bf4808a2153a75983778a1,
title = "Accelerating forex trading system through transaction log compression",
abstract = "In this paper, we propose the hardware architecture for high-speed transaction logging of forex trading system. In forex trading market, the trading volume of currencies is growing larger every year. In order to provide real-time processing of large volume and high availability service, we focused on the two types of the workload, where the bottleneck occurs, and conducted workload analysis. The bottleneck between the application server and the internal hard disk is caused by the overhead from storing the transaction logs, due to the bandwidth limitation of a hard disk. Our key idea is to suppress an overhead of the transaction logging through the compression of the transaction logs. Implementation result demonstrates the feasibility of our proposal for increasing the bandwidth through the log compression.",
keywords = "Compression, Forex trading, FPGA, Hardware acceleration, High-speed logging",
author = "Jang, \{Ji Hoon\} and Lee, \{Sang Muk\} and Kim, \{Sang Don\} and Gwon, \{Oh Seong\} and K. Eunnuri and Lee, \{Seong Mo\} and Shin, \{Jung Woo\} and Lee, \{Seung Eun\}",
note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 11th International SoC Design Conference, ISOCC 2014 ; Conference date: 03-11-2014 Through 06-11-2014",
year = "2015",
month = apr,
day = "16",
doi = "10.1109/ISOCC.2014.7087602",
language = "English",
series = "ISOCC 2014 - International SoC Design Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "74--75",
booktitle = "ISOCC 2014 - International SoC Design Conference",
}