Accurate Effective Width Extraction Methods for Sub-10nm Multi-Gate MOSFETs through Capacitance Measurement

Soyoun Kim, Sihyun Kim, Kitae Lee, Munhyeon Kim, Ryoongbin Lee, Sangwan Kim, Byung Gook Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In this brief, methods to extract the effective width through gate to source /drain capacitance in Fin/GAA nMOS are presented. With a long channel (i.e. Lg > 100nm), the planar and various multi-gate devices are simulated and compared using the simple concept that the difference between the inversion capacitance of planar and other devices is proportional to the effective width. These methods are simple but powerful tool for monitoring the within-wafer-variation of Fin/GAA(Gate-All-Around)'s effective width using electrical parameters.

Original languageEnglish
Title of host publication2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages115-117
Number of pages3
ISBN (Electronic)9781538665084
DOIs
StatePublished - Mar 2019
Event2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019 - Singapore, Singapore
Duration: 12 Mar 201915 Mar 2019

Publication series

Name2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019

Conference

Conference2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
Country/TerritorySingapore
CitySingapore
Period12/03/1915/03/19

Keywords

  • Effective width
  • Extraction Methods
  • FinFET
  • GAAFET
  • Inversion capacitance
  • Multi-gate FET
  • Within Wafer variations

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