An FPGA based compression accelerator for forex trading system

Ji Hoon Jang, Seong Mo Lee, Oh Seong Gwon, Seung Eun Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, we propose an FPGA based hardware accelerator for forex trading system. In the forex trading market, the trading volume of currencies is growing larger every year. In order to provide a real-time processing of large volume and high availability service, we focused on the two types of workload, where a bottleneck occurs. The bottleneck between an application server and an internal hard disk is caused by the overhead from storing the transaction logs, due to the bandwidth limitation of a hard disk. Our key idea is to suppress the overhead of transaction logging through the high throughput hardware compression. Compared to software compression, our hardware accelerator scored 6x better performance in compression throughput.

Original languageEnglish
Title of host publicationInformation Technology
Subtitle of host publicationNew Generations - 13th International Conference on Information Technology
EditorsShahram Latifi
PublisherSpringer Verlag
Pages711-720
Number of pages10
ISBN (Print)9783319324661
DOIs
StatePublished - 2016
Event13th International Conference on Information Technology- New Generations, ITNG 2016 - Las Vegas, United States
Duration: 4 Apr 20166 Apr 2016

Publication series

NameAdvances in Intelligent Systems and Computing
Volume448
ISSN (Print)2194-5357

Conference

Conference13th International Conference on Information Technology- New Generations, ITNG 2016
Country/TerritoryUnited States
CityLas Vegas
Period4/04/166/04/16

Keywords

  • Compression
  • Forex trading
  • FPGA
  • Hardware accelerator

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