An low complexity hardware implementation of MIMO detector with application to WLAN

Chanho Yoon; Eunyoung Choi; Jungbo Son; Sok Kyu Lee; Taehyun Jeon

An low complexity hardware implementation of MIMO detector with application to WLAN

Chanho Yoon, Eunyoung Choi, Jungbo Son, Sok Kyu Lee, Taehyun Jeon

Dept. of Electrical and Information Engineering

Electronics and Telecommunications Research Institute

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

In this paper, we describe a FPGA implementation of MI MO detector for future wireless communication system with application to wireless LAN, targeted for upcoming 802.11n standard. The MIMO detector assumes 2 transmit and 3 receive antennas. In soft-output demapper, we apply channel state information which effectively weights reliability information to soft-decision output bits for enhanced link-level performance. The implementation complexity is significantly reduced by avoiding repeated pseudo-inverse calculation for interference cancellation of every received symbol vector. Furthermore, the overall processing time and fabrication area it takes can be significantly reduced by applying bit reduction technique.

Original language	English
Title of host publication	2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring - Proceedings
Pages	2271-2275
Number of pages	5
State	Published - 2006
Event	2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring - Melbourne, Australia Duration: 7 May 2006 → 10 Jul 2006

Publication series

Name	IEEE Vehicular Technology Conference
Volume	5
ISSN (Print)	1550-2252

Conference

Conference	2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring
Country/Territory	Australia
City	Melbourne
Period	7/05/06 → 10/07/06

Cite this

@inproceedings{366066c5f765425c8d72090a545989a6,

title = "An low complexity hardware implementation of MIMO detector with application to WLAN",

abstract = "In this paper, we describe a FPGA implementation of MI MO detector for future wireless communication system with application to wireless LAN, targeted for upcoming 802.11n standard. The MIMO detector assumes 2 transmit and 3 receive antennas. In soft-output demapper, we apply channel state information which effectively weights reliability information to soft-decision output bits for enhanced link-level performance. The implementation complexity is significantly reduced by avoiding repeated pseudo-inverse calculation for interference cancellation of every received symbol vector. Furthermore, the overall processing time and fabrication area it takes can be significantly reduced by applying bit reduction technique.",

author = "Chanho Yoon and Eunyoung Choi and Jungbo Son and Lee, \{Sok Kyu\} and Taehyun Jeon",

year = "2006",

language = "English",

isbn = "0780393929",

series = "IEEE Vehicular Technology Conference",

pages = "2271--2275",

booktitle = "2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring - Proceedings",

note = "2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring ; Conference date: 07-05-2006 Through 10-07-2006",

}

Yoon, C, Choi, E, Son, J, Lee, SK & Jeon, T 2006, An low complexity hardware implementation of MIMO detector with application to WLAN. in 2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring - Proceedings., 1683261, IEEE Vehicular Technology Conference, vol. 5, pp. 2271-2275, 2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring, Melbourne, Australia, 7/05/06.

An low complexity hardware implementation of MIMO detector with application to WLAN. / Yoon, Chanho; Choi, Eunyoung; Son, Jungbo et al.
2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring - Proceedings. 2006. p. 2271-2275 1683261 (IEEE Vehicular Technology Conference; Vol. 5).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this paper, we describe a FPGA implementation of MI MO detector for future wireless communication system with application to wireless LAN, targeted for upcoming 802.11n standard. The MIMO detector assumes 2 transmit and 3 receive antennas. In soft-output demapper, we apply channel state information which effectively weights reliability information to soft-decision output bits for enhanced link-level performance. The implementation complexity is significantly reduced by avoiding repeated pseudo-inverse calculation for interference cancellation of every received symbol vector. Furthermore, the overall processing time and fabrication area it takes can be significantly reduced by applying bit reduction technique.

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M3 - Conference contribution

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An low complexity hardware implementation of MIMO detector with application to WLAN

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