TY - JOUR
T1 - An ultra-low-power neural signal acquisition analog front-end IC
AU - Tran, Luat
AU - Cha, Hyouk Kyu
N1 - Publisher Copyright:
© 2020 Elsevier Ltd
PY - 2021/1
Y1 - 2021/1
N2 - A four-channel, power-efficient, low-noise neural recording analog front-end (AFE) integrated circuit (IC) comprised of a low-noise amplifier (LNA), a programmable gain amplifier (PGA), and buffers is presented. The proposed AC-coupled capacitive-feedback LNA utilizes the inverter-stacking technique for the core operational transconductance amplifier which achieves four-time reduction in noise at minimal power consumption. The proposed PGA provides additional gain with tunable filtering function where the high-pass cut-off and low-pass cut-off frequencies can be controlled to acquire action potential and local field potential signals either simultaneously or separately. The overall AFE IC has a programmable gain range from 45 dB to 63 dB and achieves integrated input-referred noise of 3.16 μVRMS within the 10 kHz bandwidth, leading to a noise efficiency factor of 2.04 and power efficiency factor of 4.16. The AFE IC is implemented using 180 nm CMOS process and consumes 2.82 μW per channel powered from the 1-V supply voltage.
AB - A four-channel, power-efficient, low-noise neural recording analog front-end (AFE) integrated circuit (IC) comprised of a low-noise amplifier (LNA), a programmable gain amplifier (PGA), and buffers is presented. The proposed AC-coupled capacitive-feedback LNA utilizes the inverter-stacking technique for the core operational transconductance amplifier which achieves four-time reduction in noise at minimal power consumption. The proposed PGA provides additional gain with tunable filtering function where the high-pass cut-off and low-pass cut-off frequencies can be controlled to acquire action potential and local field potential signals either simultaneously or separately. The overall AFE IC has a programmable gain range from 45 dB to 63 dB and achieves integrated input-referred noise of 3.16 μVRMS within the 10 kHz bandwidth, leading to a noise efficiency factor of 2.04 and power efficiency factor of 4.16. The AFE IC is implemented using 180 nm CMOS process and consumes 2.82 μW per channel powered from the 1-V supply voltage.
KW - Analog front-end
KW - Inverter-stacking
KW - Low-noise
KW - Neural recording amplifier
KW - Programmable gain amplifier
UR - https://www.scopus.com/pages/publications/85097332692
U2 - 10.1016/j.mejo.2020.104950
DO - 10.1016/j.mejo.2020.104950
M3 - Article
AN - SCOPUS:85097332692
SN - 0026-2692
VL - 107
JO - Microelectronics Journal
JF - Microelectronics Journal
M1 - 104950
ER -