Abstract
A four-channel, power-efficient, low-noise neural recording analog front-end (AFE) integrated circuit (IC) comprised of a low-noise amplifier (LNA), a programmable gain amplifier (PGA), and buffers is presented. The proposed AC-coupled capacitive-feedback LNA utilizes the inverter-stacking technique for the core operational transconductance amplifier which achieves four-time reduction in noise at minimal power consumption. The proposed PGA provides additional gain with tunable filtering function where the high-pass cut-off and low-pass cut-off frequencies can be controlled to acquire action potential and local field potential signals either simultaneously or separately. The overall AFE IC has a programmable gain range from 45 dB to 63 dB and achieves integrated input-referred noise of 3.16 μVRMS within the 10 kHz bandwidth, leading to a noise efficiency factor of 2.04 and power efficiency factor of 4.16. The AFE IC is implemented using 180 nm CMOS process and consumes 2.82 μW per channel powered from the 1-V supply voltage.
| Original language | English |
|---|---|
| Article number | 104950 |
| Journal | Microelectronics Journal |
| Volume | 107 |
| DOIs | |
| State | Published - Jan 2021 |
Keywords
- Analog front-end
- Inverter-stacking
- Low-noise
- Neural recording amplifier
- Programmable gain amplifier
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