Analysis of thermal effects of through silicon via in 3D IC using Infrared microscopy

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Thermal management of 3D IC is an important factor in terms of performance and reliability. In this study, the feasibility of Cu TSV as a heat dissipation path was experimentally investigated. 40 μm thick Si wafer was point-heated at 50 °, 100 °, 150 ° and 200 ° and surface temperature profile on the other side was observed using IR microscope. Specimens with TSV showed higher maximum temperature and larger hot area than ones without TSV above 100 °, which implies TSV delivered the heat faster than Si bulk and can be used as a fast heat dissipation path. In a two tier stacked structure, the effect of TSV was not noticeable because of thick substrate wafer.

Original languageEnglish
Title of host publication2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages249-251
Number of pages3
ISBN (Electronic)9781467373562
DOIs
StatePublished - 10 Nov 2015
EventIEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015 - Grenoble, France
Duration: 18 May 201521 May 2015

Publication series

Name2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015

Conference

ConferenceIEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015
Country/TerritoryFrance
CityGrenoble
Period18/05/1521/05/15

Keywords

  • Heating
  • Integrated circuits
  • Microscopy
  • Silicon
  • Substrates
  • Temperature measurement
  • Three-dimensional displays

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