Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond

Xiaochen Peng; Wriddhi Chakraborty; Ankit Kaul; Wonbo Shim; Muhannad S. Bakir; Suman Datta; Shimeng Yu

doi:10.1109/IEDM13553.2020.9372091

Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond

Xiaochen Peng
, Wriddhi Chakraborty
, Ankit Kaul
, Wonbo Shim
, Muhannad S. Bakir
, Suman Datta
, Shimeng Yu

Dept. of Electrical and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

26 Scopus citations

Abstract

This paper presents 3D NeuroSim, a benchmark framework of monolithic 3D (M3D) integrated compute-in-memory (CIM) accelerators. To address the challenges of analog-to-digital converter (ADC) overhead and scaling limitations caused by high write voltage in emerging nonvolatile memory (eNVM), we propose partitioning the circuit modules in hybrid technology nodes across two stacked tiers with massive inter-tier vias. This framework features versatile back-end-of-line (BEOL)-compatible transistors, including laser-recrystallized silicon transistor and oxide transistor, and analyzes the thermal profile for M3D integration. Finally, we benchmark the CIM accelerators for VGG-8 on CIFAR-10 and reveal the substantial benefits in energy efficiency of a hybrid M3D architecture (45nm eNVM array+7nm ADC and logic).

Original language	English
Title of host publication	2020 IEEE International Electron Devices Meeting, IEDM 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	30.4.1-30.4.4
ISBN (Electronic)	9781728188881
DOIs	https://doi.org/10.1109/IEDM13553.2020.9372091
State	Published - 12 Dec 2020
Event	66th Annual IEEE International Electron Devices Meeting, IEDM 2020 - Virtual, San Francisco, United States Duration: 12 Dec 2020 → 18 Dec 2020

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
Volume	2020-December
ISSN (Print)	0163-1918

Conference

Conference	66th Annual IEEE International Electron Devices Meeting, IEDM 2020
Country/Territory	United States
City	Virtual, San Francisco
Period	12/12/20 → 18/12/20

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

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10.1109/IEDM13553.2020.9372091

Cite this

Peng, X., Chakraborty, W., Kaul, A., Shim, W., Bakir, M. S., Datta, S., & Yu, S. (2020). Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond. In 2020 IEEE International Electron Devices Meeting, IEDM 2020 (pp. 30.4.1-30.4.4). Article 9372091 (Technical Digest - International Electron Devices Meeting, IEDM; Vol. 2020-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM13553.2020.9372091

Peng, Xiaochen ; Chakraborty, Wriddhi ; Kaul, Ankit et al. / Benchmarking monolithic 3D integration for compute-in-memory accelerators : Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond. 2020 IEEE International Electron Devices Meeting, IEDM 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 30.4.1-30.4.4 (Technical Digest - International Electron Devices Meeting, IEDM).

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title = "Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond",

abstract = "This paper presents 3D NeuroSim, a benchmark framework of monolithic 3D (M3D) integrated compute-in-memory (CIM) accelerators. To address the challenges of analog-to-digital converter (ADC) overhead and scaling limitations caused by high write voltage in emerging nonvolatile memory (eNVM), we propose partitioning the circuit modules in hybrid technology nodes across two stacked tiers with massive inter-tier vias. This framework features versatile back-end-of-line (BEOL)-compatible transistors, including laser-recrystallized silicon transistor and oxide transistor, and analyzes the thermal profile for M3D integration. Finally, we benchmark the CIM accelerators for VGG-8 on CIFAR-10 and reveal the substantial benefits in energy efficiency of a hybrid M3D architecture (45nm eNVM array+7nm ADC and logic).",

author = "Xiaochen Peng and Wriddhi Chakraborty and Ankit Kaul and Wonbo Shim and Bakir, \{Muhannad S.\} and Suman Datta and Shimeng Yu",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 66th Annual IEEE International Electron Devices Meeting, IEDM 2020 ; Conference date: 12-12-2020 Through 18-12-2020",

year = "2020",

month = dec,

day = "12",

doi = "10.1109/IEDM13553.2020.9372091",

language = "English",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

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Peng, X, Chakraborty, W, Kaul, A, Shim, W, Bakir, MS, Datta, S & Yu, S 2020, Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond. in 2020 IEEE International Electron Devices Meeting, IEDM 2020., 9372091, Technical Digest - International Electron Devices Meeting, IEDM, vol. 2020-December, Institute of Electrical and Electronics Engineers Inc., pp. 30.4.1-30.4.4, 66th Annual IEEE International Electron Devices Meeting, IEDM 2020, Virtual, San Francisco, United States, 12/12/20. https://doi.org/10.1109/IEDM13553.2020.9372091

Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond. / Peng, Xiaochen; Chakraborty, Wriddhi; Kaul, Ankit et al.
2020 IEEE International Electron Devices Meeting, IEDM 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 30.4.1-30.4.4 9372091 (Technical Digest - International Electron Devices Meeting, IEDM; Vol. 2020-December).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kaul, Ankit

AU - Shim, Wonbo

AU - Bakir, Muhannad S.

AU - Datta, Suman

AU - Yu, Shimeng

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AB - This paper presents 3D NeuroSim, a benchmark framework of monolithic 3D (M3D) integrated compute-in-memory (CIM) accelerators. To address the challenges of analog-to-digital converter (ADC) overhead and scaling limitations caused by high write voltage in emerging nonvolatile memory (eNVM), we propose partitioning the circuit modules in hybrid technology nodes across two stacked tiers with massive inter-tier vias. This framework features versatile back-end-of-line (BEOL)-compatible transistors, including laser-recrystallized silicon transistor and oxide transistor, and analyzes the thermal profile for M3D integration. Finally, we benchmark the CIM accelerators for VGG-8 on CIFAR-10 and reveal the substantial benefits in energy efficiency of a hybrid M3D architecture (45nm eNVM array+7nm ADC and logic).

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Peng X, Chakraborty W, Kaul A, Shim W, Bakir MS, Datta S et al. Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond. In 2020 IEEE International Electron Devices Meeting, IEDM 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 30.4.1-30.4.4. 9372091. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM13553.2020.9372091

Benchmarking monolithic 3D integration for compute-in-memory accelerators: Overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond

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UN SDGs

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