Black-sun noise immune correlated double sampling scheme for CMOS image sensors

Je Hoon Lee; Hyeon June Kim

doi:10.1587/ELEX.18.20210175

Black-sun noise immune correlated double sampling scheme for CMOS image sensors

Je Hoon Lee, Hyeon June Kim

Dept. of Semiconductor Engineering

Kangwon National University

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

This paper presents a black-sun immune correlated double sampling (CDS) scheme for high-quality imaging. Based on an analysis of signal characteristics in strong light conditions, a clamping circuit-based signal difference generator is proposed to accurately present the bright light information. The proposed scheme eliminates the black-sun noise with simple circuitry to improve the A/D conversion efficiency. Moreover, it can be is reversible to the conventional algorithm so that it still preserves the structural advantages of the existing CMOS image sensor (CIS) structure. A prototype CIS with a column-parallel 11-bit single-slope (SS) analog-to-digital converter (ADC) was fabricated in a 0.11-µm 1P4M CIS process with a 2.9-µm pixel pitch.

Original language	English
Article number	18.20210175
Journal	IEICE Electronics Express
Volume	18
Issue number	10
DOIs	https://doi.org/10.1587/ELEX.18.20210175
State	Published - 2021

Keywords

Black-sun noise
CMOS imager sensor
Correlated double sampling
Single-slope analog digital converter

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10.1587/ELEX.18.20210175

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abstract = "This paper presents a black-sun immune correlated double sampling (CDS) scheme for high-quality imaging. Based on an analysis of signal characteristics in strong light conditions, a clamping circuit-based signal difference generator is proposed to accurately present the bright light information. The proposed scheme eliminates the black-sun noise with simple circuitry to improve the A/D conversion efficiency. Moreover, it can be is reversible to the conventional algorithm so that it still preserves the structural advantages of the existing CMOS image sensor (CIS) structure. A prototype CIS with a column-parallel 11-bit single-slope (SS) analog-to-digital converter (ADC) was fabricated in a 0.11-µm 1P4M CIS process with a 2.9-µm pixel pitch.",

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AB - This paper presents a black-sun immune correlated double sampling (CDS) scheme for high-quality imaging. Based on an analysis of signal characteristics in strong light conditions, a clamping circuit-based signal difference generator is proposed to accurately present the bright light information. The proposed scheme eliminates the black-sun noise with simple circuitry to improve the A/D conversion efficiency. Moreover, it can be is reversible to the conventional algorithm so that it still preserves the structural advantages of the existing CMOS image sensor (CIS) structure. A prototype CIS with a column-parallel 11-bit single-slope (SS) analog-to-digital converter (ADC) was fabricated in a 0.11-µm 1P4M CIS process with a 2.9-µm pixel pitch.

KW - Black-sun noise

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KW - Correlated double sampling

KW - Single-slope analog digital converter

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Black-sun noise immune correlated double sampling scheme for CMOS image sensors

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Keywords

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