Carrier-Based PWM for Circulating Current Suppression in Dual-Parallel NPC Inverters

Parallel operation of three-level inverters is frequently employed in medium- and high-power applications because of their high power density and flexibility. However, the high-frequency zero-sequence circulating current (HF-ZSCC) generated due to the difference in switching states between modules in the interleaved pulse width modulation has negative effects on the system. In this paper, improved interleaved pulse width modulation is proposed to reduce the HF-ZSCC in the parallel three-phase neutral-point-clamp inverter systems. The proposed method reduces HF-ZSCC through the phase shift of the carrier signal without affecting the output current quality and power loss. The performance of the proposed method is evaluated by comparing it with other conventional methods in the range of modulation index from 0.6 to 1, which is widely used in various applications. Simulation and experiments confirm the validity and effectiveness of the proposed method.