Abstract
This article presents a machine learning approach using CatBoost regression to model Z-interference (Z-INF) effects in scaled 3-D NAND flash memory. As vertical integration of word-lines (WLs) increases bit density, pitch scaling intensifies cellto- cell interference, widening threshold voltage (Vth) distributions, and reducing sensing margins. Conventional TCAD simulations and exponential function fitting can handle two-parameter relationships but cannot adequately model multiple variables affecting Z-INF. Our proposed three-parameter model incorporates both initial and final states of attack cells with victim cell characteristics, while maintaining extensibility for additional factors at smaller cell dimensions. Experimental results confirm that the model accurately predicts Vth distribution changes across various WL geometries with improved computational efficiency. Analysis shows Z-INF increases 4-5 times when oxide/nitride (ON) pitch decreases from 50 to 40 nm, with critical degradation below 45 nm. The model successfully accounts for process variations and identifies scaling thresholds, providing insights for reliability improvement and error correction in advanced 3-D NAND architectures.
| Original language | English |
|---|---|
| Pages (from-to) | 4851-4855 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 72 |
| Issue number | 9 |
| DOIs | |
| State | Published - 2025 |
Keywords
- 3-D NAND flash memory
- CatBoost
- model prediction
- process variation
- SHAP analysis
- threshold voltage (Vth) distribution
- Z-interference (Z-INF)