Clock boosting router: Increasing the performance of an adaptive router in Network-on-Chip (NoC)

In this paper, a simple and efficient clock boosting mechanism to increase the performance of an adaptive router in Network-on-Chip (NoC) is proposed. One of the most serious disadvantages of a fully adaptive wormhole router is performance degradation due to the routing decision time. The key idea to overcome this shortcoming is the use of different clocks in a head flit and body flits. The simulation results show that the proposed clock boosting mechanism enhances the performance of the original adaptive router by increasing the accepted load and decreasing the average latency in the region of effective bandwidth. The enhanced throughput of a router results in power saving by reducing the operating frequency of a router for certain communication bandwidth requirements.