Compute-in-Memory: From Device Innovation to 3D System Integration

Shimeng Yu, Wonbo Shim, Jae Hur, Yuan Chun Luo, Gihun Choe, Wantong Li, Anni Lu, Xiaochen Peng

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

Compute-in-memory (CIM) hardware accelerator has been emerged as a promising paradigm for executing the artificial intelligence (AI) tasks owing to its superior energy efficiency. In this keynote presentation, we survey recent progresses of CIM technologies from device-level demonstration to system-level benchmark. First, the ferroelectric devices (FeM-FinFET., ferroelectric non-volatile capacitor) are introduced for resistive and capacitive read-out mechanism for crossbar arrays. Second, resistive random access memory (RRAM) based CIM macro has been taped-out into prototype chips in commercial foundry process and the related NeuroSim validation with measured silicon data is shown. Last, heterogeneous 3D integration scheme for SRAM, RRAM and 3D NAND tiers and logic tier is proposed.

Original languageEnglish
Title of host publicationESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference, Proceedings
PublisherEditions Frontieres
Pages21-28
Number of pages8
ISBN (Electronic)9781665437479
DOIs
StatePublished - 2021
Event51st IEEE European Solid-State Device Research Conference, ESSDERC 2021 - Virtual, Online, France
Duration: 6 Sep 20219 Sep 2021

Publication series

NameEuropean Solid-State Device Research Conference
Volume2021-September
ISSN (Print)1930-8876

Conference

Conference51st IEEE European Solid-State Device Research Conference, ESSDERC 2021
Country/TerritoryFrance
CityVirtual, Online
Period6/09/219/09/21

Keywords

  • compute-in-memory
  • ferroelectric device
  • hardware accelerator
  • heterogeneous 3D integration
  • resistive random access memory (RRAM)

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