TY - GEN
T1 - Cu-Cu Bonding using Optimized Copper Nitride Passivation for 3D Packaging Applications
AU - Park, Haesung
AU - Park, Seungmin
AU - Kim, Yoonho
AU - Kim, Sarah Eunkyung
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/7/6
Y1 - 2021/7/6
N2 - 3D packaging is able to keep the scaling in semiconductor market. Increased and shorter interconnects achieved by vertical stacking have benefits such as improved performance, reduced signal delay, and small form factor. In order to obtain high-quality 3D packaging applications, the integration of heterogeneous devices through bonding technologies is very important. Low temperature and pressure are essential during the bonding process because most of logic/memory devices has many metal and low-k dielectric layers, which are vulnerable to thermal budget and mechanical stress. Therefore, a small amount of solder with a low melting point is presently used on the top of the copper pillar for mass production. But, solder creates an intermetallic compound with copper at the bonding interface and cannot be applied to fine pitch patterns due to their reflow characteristics. Thus, Cu is emerged as a promising interconnect, but Cu-Cu bonding has few challenges because copper is easily oxidized and has a high melting point. In this paper, copper nitride, which prevents oxidation of the copper surface and promotes low temperature bonding, was studied by two step Ar/N2 plasma treatment. The optimum thickness of copper nitride passivation was derived using the design of experiment. It was also found that the copper nitride layer was almost decomposed at a temperature of 200°C.
AB - 3D packaging is able to keep the scaling in semiconductor market. Increased and shorter interconnects achieved by vertical stacking have benefits such as improved performance, reduced signal delay, and small form factor. In order to obtain high-quality 3D packaging applications, the integration of heterogeneous devices through bonding technologies is very important. Low temperature and pressure are essential during the bonding process because most of logic/memory devices has many metal and low-k dielectric layers, which are vulnerable to thermal budget and mechanical stress. Therefore, a small amount of solder with a low melting point is presently used on the top of the copper pillar for mass production. But, solder creates an intermetallic compound with copper at the bonding interface and cannot be applied to fine pitch patterns due to their reflow characteristics. Thus, Cu is emerged as a promising interconnect, but Cu-Cu bonding has few challenges because copper is easily oxidized and has a high melting point. In this paper, copper nitride, which prevents oxidation of the copper surface and promotes low temperature bonding, was studied by two step Ar/N2 plasma treatment. The optimum thickness of copper nitride passivation was derived using the design of experiment. It was also found that the copper nitride layer was almost decomposed at a temperature of 200°C.
KW - 3D packaging
KW - copper nitride
KW - Cu-Cu bonding
KW - low-temperature bonding
KW - optimization
UR - https://www.scopus.com/pages/publications/85116283494
U2 - 10.1109/IITC51362.2021.9537344
DO - 10.1109/IITC51362.2021.9537344
M3 - Conference contribution
AN - SCOPUS:85116283494
T3 - 2021 IEEE International Interconnect Technology Conference, IITC 2021
BT - 2021 IEEE International Interconnect Technology Conference, IITC 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 24th Annual IEEE International Interconnect Technology Conference, IITC 2021
Y2 - 6 July 2021 through 9 July 2021
ER -