Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs

Hyeon June Kim; Sun Il Hwang; Ji Wook Kwon; Dong Hwan Jin; Byoung Soo Choi; Sang Gwon Lee; Jong Ho Park; Jang Kyoo Shin; Seung Tak Ryu

doi:10.1109/ASSCC.2015.7387503

Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs

Hyeon June Kim, Sun Il Hwang, Ji Wook Kwon, Dong Hwan Jin, Byoung Soo Choi, Sang Gwon Lee, Jong Ho Park, Jang Kyoo Shin, Seung Tak Ryu

Dept. of Semiconductor Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26 % depending on the image patterns.

Original language	English
Title of host publication	2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467371919
DOIs	https://doi.org/10.1109/ASSCC.2015.7387503
State	Published - 19 Jan 2016
Event	11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Xiamen, Fujian, China Duration: 9 Nov 2015 → 11 Nov 2015

Publication series

Name	2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings

Conference

Conference	11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015
Country/Territory	China
City	Xiamen, Fujian
Period	9/11/15 → 11/11/15

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10.1109/ASSCC.2015.7387503

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Kim, H. J., Hwang, S. I., Kwon, J. W., Jin, D. H., Choi, B. S., Lee, S. G., Park, J. H., Shin, J. K., & Ryu, S. T. (2016). Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. In 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings Article 7387503 (2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASSCC.2015.7387503

Kim, Hyeon June ; Hwang, Sun Il ; Kwon, Ji Wook et al. / Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. (2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings).

@inproceedings{dbbc93fbdc0243738b033b841760f3f1,

title = "Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs",

abstract = "A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26 \% depending on the image patterns.",

author = "Kim, \{Hyeon June\} and Hwang, \{Sun Il\} and Kwon, \{Ji Wook\} and Jin, \{Dong Hwan\} and Choi, \{Byoung Soo\} and Lee, \{Sang Gwon\} and Park, \{Jong Ho\} and Shin, \{Jang Kyoo\} and Ryu, \{Seung Tak\}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 ; Conference date: 09-11-2015 Through 11-11-2015",

year = "2016",

month = jan,

day = "19",

doi = "10.1109/ASSCC.2015.7387503",

language = "English",

series = "2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Kim, HJ, Hwang, SI, Kwon, JW, Jin, DH, Choi, BS, Lee, SG, Park, JH, Shin, JK & Ryu, ST 2016, Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. in 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings., 7387503, 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xiamen, Fujian, China, 9/11/15. https://doi.org/10.1109/ASSCC.2015.7387503

Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. / Kim, Hyeon June; Hwang, Sun Il; Kwon, Ji Wook et al.
2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. 7387503 (2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kim, Hyeon June

AU - Hwang, Sun Il

AU - Kwon, Ji Wook

AU - Jin, Dong Hwan

AU - Choi, Byoung Soo

AU - Lee, Sang Gwon

AU - Park, Jong Ho

AU - Shin, Jang Kyoo

AU - Ryu, Seung Tak

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N2 - A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26 % depending on the image patterns.

AB - A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26 % depending on the image patterns.

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Kim HJ, Hwang SI, Kwon JW, Jin DH, Choi BS, Lee SG et al. Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. In 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2016. 7387503. (2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings). doi: 10.1109/ASSCC.2015.7387503

Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs

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