Design and analysis for 3D vertical resistive random access memory structures with silicon bottom electrodes

In this work, we propose two 3D vertical RRAM structures and their detailed fabrication methods. One is a double-horizontal-electrode (DHE) structure where a top electrode covers both sides of a silicon bottom electrode, and the other is a gate-all-around (GAA) structure where silicon nanowires are enclosed by resistive switching layers and resistive switching layers are enclosed by top electrodes. In these two 3D vertical structures, the chemical vapor deposition (CVD) process is essential for deposition of a resistive switching layer and a top electrode material, and heavily bottom electrode. Several advantages of resistive random access memory (RRAM) with metal-insulator-semiconductor (MIS) structure are also investigated. Furthermore, we fabricated a W/Si₃N₄/n⁺-doped-polysilicon RRAM device, composed of suitable materials for the proposed 3D RRAM structures and investigated its resistive switching characteristics.