@inproceedings{0ad8bd23a28b41bf9d66ad4e807f7147,
title = "Design of 32-bit Processor for Embedded Systems",
abstract = "In this paper, we propose a 32-bit processor for the embedded system. In order to provide less area and low power operation, we adopt MIPS instruction set architecture (ISA) to our processor. The processor consists of five pipeline stages to reduce the critical path. In order to solve the data hazard in pipeline stages, we design the data forwarding unit and stall unit with optimized bubble insertion. The processor is implemented on a field programmable gate array (FPGA), and we verify the functionality of the processor and measure the performance by using the Dhrystone benchmark. The Dhrystone MIPS (DMIPS) is measured at 27.71 at 50 MHz operation.",
keywords = "data forwarding, embedded system, MIPS, pipelining, stall",
author = "Oh, \{Hyun Woo\} and Cho, \{Kwon Neung\} and Lee, \{Seung Eun\}",
note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 17th International System-on-Chip Design Conference, ISOCC 2020 ; Conference date: 21-10-2020 Through 24-10-2020",
year = "2020",
month = oct,
day = "21",
doi = "10.1109/ISOCC50952.2020.9332944",
language = "English",
series = "Proceedings - International SoC Design Conference, ISOCC 2020",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "306--307",
booktitle = "Proceedings - International SoC Design Conference, ISOCC 2020",
}