Design of a deadlock-free XY-YX router for Network-on-Chip

Sang Muk Lee; Eun Nu Ri Ko; Young Seob Jeong; Seung Eun Lee

doi:10.1007/978-3-319-32467-8_61

Design of a deadlock-free XY-YX router for Network-on-Chip

Sang Muk Lee, Eun Nu Ri Ko, Young Seob Jeong, Seung Eun Lee

Electronic Engineering Program

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

With the increasing number of cores in multiprocessor System-on-Chip (SoC), the design of an efficient communication fabric is essential to satisfy the bandwidth requirements of multiprocessor systems. Nowadays, scalable Networkon- Chips (NoC) are becoming the standard communication framework to replace bus-based networks. In this paper, we propose a deadlock-free XY-YX router for on-chip networks. In order to prevent deadlocks, we exploit additional physical channels in horizontal direction and optimize the priority of output channel allocation. Experimental results prove that the proposed deadlock-free router enhances the throughput of NoC.

Original language	English
Title of host publication	Information Technology
Subtitle of host publication	New Generations - 13th International Conference on Information Technology
Editors	Shahram Latifi
Publisher	Springer Verlag
Pages	701-710
Number of pages	10
ISBN (Print)	9783319324661
DOIs	https://doi.org/10.1007/978-3-319-32467-8_61
State	Published - 2016
Event	13th International Conference on Information Technology- New Generations, ITNG 2016 - Las Vegas, United States Duration: 4 Apr 2016 → 6 Apr 2016

Publication series

Name	Advances in Intelligent Systems and Computing
Volume	448
ISSN (Print)	2194-5357

Conference

Conference	13th International Conference on Information Technology- New Generations, ITNG 2016
Country/Territory	United States
City	Las Vegas
Period	4/04/16 → 6/04/16

Keywords

Interconnection network
Network-on-Chip (NoC)
Router algorithm
Router design

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10.1007/978-3-319-32467-8_61

Cite this

Lee, S. M., Ko, E. N. R., Jeong, Y. S., & Lee, S. E. (2016). Design of a deadlock-free XY-YX router for Network-on-Chip. In S. Latifi (Ed.), Information Technology: New Generations - 13th International Conference on Information Technology (pp. 701-710). (Advances in Intelligent Systems and Computing; Vol. 448). Springer Verlag. https://doi.org/10.1007/978-3-319-32467-8_61

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title = "Design of a deadlock-free XY-YX router for Network-on-Chip",

abstract = "With the increasing number of cores in multiprocessor System-on-Chip (SoC), the design of an efficient communication fabric is essential to satisfy the bandwidth requirements of multiprocessor systems. Nowadays, scalable Networkon- Chips (NoC) are becoming the standard communication framework to replace bus-based networks. In this paper, we propose a deadlock-free XY-YX router for on-chip networks. In order to prevent deadlocks, we exploit additional physical channels in horizontal direction and optimize the priority of output channel allocation. Experimental results prove that the proposed deadlock-free router enhances the throughput of NoC.",

keywords = "Interconnection network, Network-on-Chip (NoC), Router algorithm, Router design",

author = "Lee, \{Sang Muk\} and Ko, \{Eun Nu Ri\} and Jeong, \{Young Seob\} and Lee, \{Seung Eun\}",

note = "Publisher Copyright: {\textcopyright} Springer International Publishing Switzerland 2016.; 13th International Conference on Information Technology- New Generations, ITNG 2016 ; Conference date: 04-04-2016 Through 06-04-2016",

year = "2016",

doi = "10.1007/978-3-319-32467-8\_61",

language = "English",

isbn = "9783319324661",

series = "Advances in Intelligent Systems and Computing",

publisher = "Springer Verlag",

pages = "701--710",

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}

Lee, SM, Ko, ENR, Jeong, YS & Lee, SE 2016, Design of a deadlock-free XY-YX router for Network-on-Chip. in S Latifi (ed.), Information Technology: New Generations - 13th International Conference on Information Technology. Advances in Intelligent Systems and Computing, vol. 448, Springer Verlag, pp. 701-710, 13th International Conference on Information Technology- New Generations, ITNG 2016, Las Vegas, United States, 4/04/16. https://doi.org/10.1007/978-3-319-32467-8_61

Design of a deadlock-free XY-YX router for Network-on-Chip. / Lee, Sang Muk; Ko, Eun Nu Ri; Jeong, Young Seob et al.
Information Technology: New Generations - 13th International Conference on Information Technology. ed. / Shahram Latifi. Springer Verlag, 2016. p. 701-710 (Advances in Intelligent Systems and Computing; Vol. 448).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - With the increasing number of cores in multiprocessor System-on-Chip (SoC), the design of an efficient communication fabric is essential to satisfy the bandwidth requirements of multiprocessor systems. Nowadays, scalable Networkon- Chips (NoC) are becoming the standard communication framework to replace bus-based networks. In this paper, we propose a deadlock-free XY-YX router for on-chip networks. In order to prevent deadlocks, we exploit additional physical channels in horizontal direction and optimize the priority of output channel allocation. Experimental results prove that the proposed deadlock-free router enhances the throughput of NoC.

AB - With the increasing number of cores in multiprocessor System-on-Chip (SoC), the design of an efficient communication fabric is essential to satisfy the bandwidth requirements of multiprocessor systems. Nowadays, scalable Networkon- Chips (NoC) are becoming the standard communication framework to replace bus-based networks. In this paper, we propose a deadlock-free XY-YX router for on-chip networks. In order to prevent deadlocks, we exploit additional physical channels in horizontal direction and optimize the priority of output channel allocation. Experimental results prove that the proposed deadlock-free router enhances the throughput of NoC.

KW - Interconnection network

KW - Network-on-Chip (NoC)

KW - Router algorithm

KW - Router design

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Design of a deadlock-free XY-YX router for Network-on-Chip

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