Design of sub-threshold current memory circuit for low power ADC

Sung Dae Yeo, Young Jin Jang, Kyung Ryang Lee, Seong Kweon Kim

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, it is proposed that the current memory circuit should be operated in sub-threshold region for low power of Analog to Digital Converter (ADC). When to store the sampling information of the analog signal and to pass to the next stage is used with the current memory circuit. The current memory circuit is used when the sampling information of the analog signal is to be transmitted, after it is stored. The supply voltage of designed circuit is supplied by 1.2V for the operation of sub-threshold region. Regarding the transistor in the simulation, it is used by the BSIM3 model of 0.35μm process in TSMC. According to the design conditions for minimizing effect at Clock-Feedthrough, it was designed with switch MOSFET width of 1μm, dummy MOSFET width of 8.82μm and memory MOSFET width of 2μm. From the simulation result, it was demonstrated that memory time in current memory circuit was 0.5ms at operations of sub-threshold. Power consumption of designed sub-threshold current memory circuit is 11.17μW.

Original languageEnglish
Pages (from-to)308-312
Number of pages5
JournalInformation Systems
Volume48
DOIs
StatePublished - Mar 2015

Keywords

  • Clock-Feedthrough
  • Current memory
  • Current-mode
  • Low power
  • Sub-threshold

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