Evaluating the worst-case performance of flash translation layer

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

NAND-based block devices are widely used in various computing devices, and the intesive studies have been performed to improve the average performance of NAND-based block devices with desiging efficient flash translation layer (FTL) schemes. However, the worst-case performance has been beyond the focus. The goal of this work is to evaluate the worst-case performance of the representive FTL schemes. The trace-drive simulation shows that the page mapping scheme delivers the best worst-case performance. In contrast, the FAST scheme and the SBAST scheme, which deliver a good average performance, are bad in the aspect of the worst-case performance.

Original languageEnglish
Title of host publicationComputer Applications for Modeling, Simulation, and Automobile - International Conferences, MAS and ASNT 2012, Held in Conjunction with GST 2012, Proceedings
PublisherSpringer Verlag
Pages27-33
Number of pages7
ISBN (Print)9783642352478
DOIs
StatePublished - 2012
Event2012 International Conference on Modeling and Simulation, MAS 2012 and the 2012 International Conference on Automotive Science and Technology, ASNT 2012, Held in Conjunction with GST 2012 - Jeju Island, Korea, Republic of
Duration: 28 Nov 20122 Dec 2012

Publication series

NameCommunications in Computer and Information Science
Volume341 CCIS
ISSN (Print)1865-0929

Conference

Conference2012 International Conference on Modeling and Simulation, MAS 2012 and the 2012 International Conference on Automotive Science and Technology, ASNT 2012, Held in Conjunction with GST 2012
Country/TerritoryKorea, Republic of
CityJeju Island
Period28/11/122/12/12

Keywords

  • flash translation layer
  • NAND-based block devices
  • worst-case performance

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