Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models

Jihoon Jang, Inseong Hwang, Hyun Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents the simulator design and evaluation of a 2TOC DRAM-based Processing-in-Memory (PIM) system designed to optimize deep learning applications. By customizing DRAMsim3 to simulate the unique characteristics of 2TOC DRAM, experimental results with deep learning models such as VGG-8 and AlexNet demonstrate that the 2TOC DRAM-based PIM system achieves computational speeds up to 30 x and energy efficiency up to 23 x compared to conventional CPU systems.

Original languageEnglish
Title of host publication2025 International Conference on Electronics, Information, and Communication, ICEIC 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331510756
DOIs
StatePublished - 2025
Event2025 International Conference on Electronics, Information, and Communication, ICEIC 2025 - Osaka, Japan
Duration: 19 Jan 202522 Jan 2025

Publication series

Name2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

Conference

Conference2025 International Conference on Electronics, Information, and Communication, ICEIC 2025
Country/TerritoryJapan
CityOsaka
Period19/01/2522/01/25

Keywords

  • 2TOC DRAM
  • Deep Neural Network
  • Memory Simulator
  • Processing-In-Memory

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