Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models

Jihoon Jang; Inseong Hwang; Hyun Kim

doi:10.1109/ICEIC64972.2025.10879609

Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models

Jihoon Jang
, Inseong Hwang
, Hyun Kim

Dept. of Electrical and Information Engineering

Seoul National University of Science and Technology (SNUST)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents the simulator design and evaluation of a 2TOC DRAM-based Processing-in-Memory (PIM) system designed to optimize deep learning applications. By customizing DRAMsim3 to simulate the unique characteristics of 2TOC DRAM, experimental results with deep learning models such as VGG-8 and AlexNet demonstrate that the 2TOC DRAM-based PIM system achieves computational speeds up to 30 x and energy efficiency up to 23 x compared to conventional CPU systems.

Original language	English
Title of host publication	2025 International Conference on Electronics, Information, and Communication, ICEIC 2025
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798331510756
DOIs	https://doi.org/10.1109/ICEIC64972.2025.10879609
State	Published - 2025
Event	2025 International Conference on Electronics, Information, and Communication, ICEIC 2025 - Osaka, Japan Duration: 19 Jan 2025 → 22 Jan 2025

Publication series

Name	2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

Conference

Conference	2025 International Conference on Electronics, Information, and Communication, ICEIC 2025
Country/Territory	Japan
City	Osaka
Period	19/01/25 → 22/01/25

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

2TOC DRAM
Deep Neural Network
Memory Simulator
Processing-In-Memory

Access to Document

10.1109/ICEIC64972.2025.10879609

Cite this

Jang, J., Hwang, I., & Kim, H. (2025). Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models. In 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025 (2025 International Conference on Electronics, Information, and Communication, ICEIC 2025). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICEIC64972.2025.10879609

Jang, Jihoon ; Hwang, Inseong ; Kim, Hyun. / Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models. 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025. Institute of Electrical and Electronics Engineers Inc., 2025. (2025 International Conference on Electronics, Information, and Communication, ICEIC 2025).

@inproceedings{d68ad3971d4d4c099cb4362cbd15075d,

title = "Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models",

abstract = "This paper presents the simulator design and evaluation of a 2TOC DRAM-based Processing-in-Memory (PIM) system designed to optimize deep learning applications. By customizing DRAMsim3 to simulate the unique characteristics of 2TOC DRAM, experimental results with deep learning models such as VGG-8 and AlexNet demonstrate that the 2TOC DRAM-based PIM system achieves computational speeds up to 30 x and energy efficiency up to 23 x compared to conventional CPU systems.",

keywords = "2TOC DRAM, Deep Neural Network, Memory Simulator, Processing-In-Memory",

author = "Jihoon Jang and Inseong Hwang and Hyun Kim",

note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025 ; Conference date: 19-01-2025 Through 22-01-2025",

year = "2025",

doi = "10.1109/ICEIC64972.2025.10879609",

language = "English",

series = "2025 International Conference on Electronics, Information, and Communication, ICEIC 2025",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2025 International Conference on Electronics, Information, and Communication, ICEIC 2025",

}

Jang, J, Hwang, I & Kim, H 2025, Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models. in 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025. 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025, Institute of Electrical and Electronics Engineers Inc., 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025, Osaka, Japan, 19/01/25. https://doi.org/10.1109/ICEIC64972.2025.10879609

Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models. / Jang, Jihoon; Hwang, Inseong; Kim, Hyun.
2025 International Conference on Electronics, Information, and Communication, ICEIC 2025. Institute of Electrical and Electronics Engineers Inc., 2025. (2025 International Conference on Electronics, Information, and Communication, ICEIC 2025).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models

AU - Jang, Jihoon

AU - Hwang, Inseong

AU - Kim, Hyun

PY - 2025

Y1 - 2025

N2 - This paper presents the simulator design and evaluation of a 2TOC DRAM-based Processing-in-Memory (PIM) system designed to optimize deep learning applications. By customizing DRAMsim3 to simulate the unique characteristics of 2TOC DRAM, experimental results with deep learning models such as VGG-8 and AlexNet demonstrate that the 2TOC DRAM-based PIM system achieves computational speeds up to 30 x and energy efficiency up to 23 x compared to conventional CPU systems.

AB - This paper presents the simulator design and evaluation of a 2TOC DRAM-based Processing-in-Memory (PIM) system designed to optimize deep learning applications. By customizing DRAMsim3 to simulate the unique characteristics of 2TOC DRAM, experimental results with deep learning models such as VGG-8 and AlexNet demonstrate that the 2TOC DRAM-based PIM system achieves computational speeds up to 30 x and energy efficiency up to 23 x compared to conventional CPU systems.

KW - 2TOC DRAM

KW - Deep Neural Network

KW - Memory Simulator

KW - Processing-In-Memory

UR - https://www.scopus.com/pages/publications/86000028677

U2 - 10.1109/ICEIC64972.2025.10879609

DO - 10.1109/ICEIC64972.2025.10879609

M3 - Conference contribution

AN - SCOPUS:86000028677

T3 - 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

BT - 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

Y2 - 19 January 2025 through 22 January 2025

ER -

Jang J, Hwang I, Kim H. Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models. In 2025 International Conference on Electronics, Information, and Communication, ICEIC 2025. Institute of Electrical and Electronics Engineers Inc. 2025. (2025 International Conference on Electronics, Information, and Communication, ICEIC 2025). doi: 10.1109/ICEIC64972.2025.10879609

Evaluation of 2T0C DRAM-Based Processing-in-Memory Systems for Accelerating Deep Neural Network Models

Abstract

Publication series

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UN SDGs

Keywords

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