High-Speed Multilevel Binary Imaging CMOS Image Sensor for Object Feature Extraction

Yong Seok Lee, Hyeon June Kim

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

To overcome the limitations of the thresholding method for binary imaging and to realize multilevel binary imaging in real time, this study presents a dual-imaging CMOS image sensor (CIS) that extracts a normal image and its binary image. By effectively utilizing the column reset period of the existing readout structure, the proposed CIS extracts real-time multilevel binary images, thus allowing the binary imaging capability to extract perceptible features of target objects. The proposed CIS maintains the conventional column readout structure, which preserves its structural advantages and compatibility with existing CIS systems. Moreover, given that the proposed CIS can reduce the amount of data computation required for real-time feature extraction, it provides the advantage of price competitiveness. In this study, it was verified that the proposed CIS is suitable for the extraction of real-time object features in various vision applications utilizing binary image information. A prototype CIS with the proposed dual-imaging readout scheme was implemented in a 1-poly 6-metal (1P6M) 0.18 ~μ m CMOS technology process. A frame rate of 360 fps was achieved with a pixel resolution of 480×200. The total power consumption was 49.3 mW. This prototype CIS achieved the figure-of-merits (FoM) of 960 ~μ Vċ pJ, 0.93 ~μ Vċ pJ/steps, 9.34 mV/MHz, and 0.02 ~μ V /MHz/steps.

Original languageEnglish
Pages (from-to)15934-15943
Number of pages10
JournalIEEE Sensors Journal
Volume22
Issue number16
DOIs
StatePublished - 15 Aug 2022

Keywords

  • CMOS image sensor (CIS)
  • column-parallel readout ADC
  • dual-imaging CIS
  • feature extraction
  • multilevel binary imaging
  • single-slope analog-to-digital convertor (SS ADC)
  • thresholding method

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