Impact of random phase distribution in 3D vertical NAND architecture of ferroelectric transistors on in-memory computing

Gihun Choe, Wonbo Shim, Jae Hur, Asif Islam Khan, Shimeng Yu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Ferroelectric field-effect transistors (FeFETs) with 3D vertical NAND architecture (3D V-NAND) are investigated for in-memory computing. In polycrystalline ferroelectric Hafnia thin film, there are different phases such as monoclinic (M), and orthorhombic (O) phases. Those are randomly distributed throughout the ferroelectric gate stack. Such positional dispersion of two phases introduces read-out current variation in 3D V-NAND of FeFETs. Herein, we employ TCAD simulations to quantify such variation and optimize bias conditions for improving the accuracy of in-memory computing.

Original languageEnglish
Title of host publication2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages165-168
Number of pages4
ISBN (Electronic)9784863487635
DOIs
StatePublished - 23 Sep 2020
Event2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020 - Virtual, Kobe, Japan
Duration: 3 Sep 20206 Oct 2020

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume2020-September

Conference

Conference2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
Country/TerritoryJapan
CityVirtual, Kobe
Period3/09/206/10/20

Keywords

  • Ferroelectric
  • In-memory computing
  • Mixed phases
  • Nonvolatile memory
  • Variations

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