Impact of Random Phase Distribution in Ferroelectric Transistors-Based 3-D NAND Architecture on In-Memory Computing

Three-dimensional NAND architecture (3-D NAND) based on ferroelectric field-effect transistors (FeFETs) is explored for in-memory computing. In ferroelectric Hafnia-based polycrystalline thin film, which is deposited on the gate of the FeFETs, the monoclinic (M), and orthorhombic (O) phases coexist. These two phases of positional distribution introduce a read-out current variation in the 3-D NAND of FeFETs. Herein, we employ TCAD simulations to quantify such variation and optimize bias conditions for improving the accuracy of in-memory computing. Furthermore, the array-level impact of the phase variation on vector-matrix multiplication has been investigated using a 3-D netlist with SPICE simulations, indicating sufficient read-out accuracy possible for analog-to-digital conversion.