Implementation and performance analysis of programmable test beds for real-time wireless W-CDMA

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Abstract

We have proposed the programmable test beds that present the system-level environment to verify and analyze the performance of baseband MODEM schemes and RF/IF hardware for Wideband CDMA (W-CDMA), PCS, CDMA2000, and IMT-2000 systems. These test beds have been implemented with 10 FPGAs for channel CODEC and commercial components for RF/IF transceiver. The DSP boards for real-time H.263 encoding/decoding and hardware channel-emulator have been also used. Therefore, our test beds allow the rapid development of each blocks and enable to reduce Turn-Around-Time (TAT) by easily analyzing the multimedia data communication systems up to 1 Mbps/20 Mcps. The measurement results show that the performance of our test beds is identical to that of commercial CDMA systems in restrict experimental environments.

Original languageEnglish
Pages (from-to)IV-386-IV-389
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
StatePublished - 1999
EventProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
Duration: 30 May 19992 Jun 1999

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