Improvement and reduction of common mode voltage in active zero space vector pulse width modulation in three-phase inverter

Yongkeun Lee, Janghyeon Lee, Jangwook Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper describes common mode voltage (CMV) of popular pulse width modulation (PWM) methods for driving three-phase voltage source inverter (VSI). Among PWM methods tested, Active zero space vector PWM (AZSVPWM) provides the minimum CMV. However, study on a switching loss and RMS of CMV in AZSVPWM has been ignored. In this paper, not only studying CMV of popular PWM methods, but also, we propose and verify our method to reduce switching loss or RMS of CMV in AZSVPWM. It is verified by Matlab/Simulink.

Original languageEnglish
Title of host publication2017 IEEE Transportation Electrification Conference and Expo, Asia-Pacific, ITEC Asia-Pacific 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538628942
DOIs
StatePublished - 23 Oct 2017
Event2017 IEEE Transportation Electrification Conference and Expo, Asia-Pacific, ITEC Asia-Pacific 2017 - Harbin, China
Duration: 7 Aug 201710 Aug 2017

Publication series

Name2017 IEEE Transportation Electrification Conference and Expo, Asia-Pacific, ITEC Asia-Pacific 2017

Conference

Conference2017 IEEE Transportation Electrification Conference and Expo, Asia-Pacific, ITEC Asia-Pacific 2017
Country/TerritoryChina
CityHarbin
Period7/08/1710/08/17

Keywords

  • Common mode voltage
  • Pulse width modulation
  • Three phase inverter

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