TY - JOUR
T1 - In-depth Survey of Processing-in-memory Architectures for Deep Neural Networks
AU - Jang, Ji Hoon
AU - Shin, Jin
AU - Park, Jun Tae
AU - Hwang, In Seong
AU - Kim, Hyun
N1 - Publisher Copyright:
© 2023, Institute of Electronics Engineers of Korea. All rights reserved.
PY - 2023/10
Y1 - 2023/10
N2 - Processing-in-Memory (PIM) is an emerging computing architecture that has gained significant attention in recent times. It aims to maximize data movement efficiency by moving away from the traditional von Neumann architecture. PIM is particularly well-suited for handling deep neural networks (DNNs) that require significant data movement between the processing unit and the memory device. As a result, there has been substantial research in this area. To optimally handle DNNs with diverse structures and inductive biases, such as convolutional neural networks, graph convolutional networks, recurrent neural networks, and transformers, within a PIM architecture, careful consideration should be given to how data mapping and data flow are processed in PIM. This paper aims to provide insight into these aspects by analyzing the characteristics of various DNNs and providing detailed explanations of how they have been implemented with PIM architectures using commercially available memory technologies like DRAM and next-generation memory technologies like ReRAM.
AB - Processing-in-Memory (PIM) is an emerging computing architecture that has gained significant attention in recent times. It aims to maximize data movement efficiency by moving away from the traditional von Neumann architecture. PIM is particularly well-suited for handling deep neural networks (DNNs) that require significant data movement between the processing unit and the memory device. As a result, there has been substantial research in this area. To optimally handle DNNs with diverse structures and inductive biases, such as convolutional neural networks, graph convolutional networks, recurrent neural networks, and transformers, within a PIM architecture, careful consideration should be given to how data mapping and data flow are processed in PIM. This paper aims to provide insight into these aspects by analyzing the characteristics of various DNNs and providing detailed explanations of how they have been implemented with PIM architectures using commercially available memory technologies like DRAM and next-generation memory technologies like ReRAM.
KW - deep learning
KW - deep neural network
KW - near-memory computing
KW - next-generation memory
KW - Processing-in-memory
UR - http://www.scopus.com/inward/record.url?scp=85175943610&partnerID=8YFLogxK
U2 - 10.5573/JSTS.2023.23.5.322
DO - 10.5573/JSTS.2023.23.5.322
M3 - Article
AN - SCOPUS:85175943610
SN - 1598-1657
VL - 23
SP - 322
EP - 339
JO - Journal of Semiconductor Technology and Science
JF - Journal of Semiconductor Technology and Science
IS - 5
ER -