Interfacial Trap-based 1-row Hammer Analysis of BCAT and Nitride Layer BCAT Structures in Dynamic Random Access Memory

Dynamic Random Access Memory is critical to computing for its speed and cost-effective capacity. As the demand for high-capacity memory grows, DRAM is being scaled down. However, reduced cell distances cause electrical disturbances between cells, resulting in 1-row hammer. This leads to abnormal operation and security risks. Therefore, 1-row Hammer is a major issue in modern DRAM technology. In this paper, we study the principle and impact of 1-row Hammer in DRAM, with a focus on D0 failures, a type of 1-row Hammer that causes stored data to transition from 0 to 1 due to repeated access. The mechanism involves the electron capture and diffusion of electrons affected by interfacial traps and device structures. To investigate the D0 failure, we reproduced the 1-row hammer using mixed mode to evaluate the effects on the interfacial trap and device structure changes. This research serves to improve understanding of row hammer and suggests a mitigation strategy using nitride layer. The proposed structure improves the D0 failure by about 70%, effectively improving the security vulnerability of DRAM.