Lanthanum-oxide-doped nitride charge-trap layer for a TANOS memory device

Jong Kyung Park; Youngmin Park; Seok Hee Lee; Sung Kyu Im; Jae Sub Oh; Moon Sig Joo; Kwon Hong; Byung Jin Cho

doi:10.1109/TED.2011.2161993

Lanthanum-oxide-doped nitride charge-trap layer for a TANOS memory device

Jong Kyung Park, Youngmin Park, Seok Hee Lee, Sung Kyu Im, Jae Sub Oh, Moon Sig Joo, Kwon Hong, Byung Jin Cho

Dept. of Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

A charge-trap-type Flash memory with a La₂O₃-doped Si₃N₄ charge-trapping layer is demonstrated for the first time. An ultrathin La₂O₃ layer is inserted in the middle of a Si₃N₄ layer, followed by high-temperature annealing to mix the two layers. The La₂O₃-doped Si ₃N₄ layer, irrespective of Si₃N₄ deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La₂O₃ layer thickness and position in the Si₃N₄ trapping layer has been also systematically studied.

Original language	English
Article number	5983430
Pages (from-to)	3314-3320
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	58
Issue number	10
DOIs	https://doi.org/10.1109/TED.2011.2161993
State	Published - Oct 2011

Keywords

Charge-trap Flash memory
TaN/AlN/SiO/Si (TANOS)
lanthanum oxide
nitride
retention
trapping energy level

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10.1109/TED.2011.2161993

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title = "Lanthanum-oxide-doped nitride charge-trap layer for a TANOS memory device",

abstract = "A charge-trap-type Flash memory with a La2O3-doped Si3N4 charge-trapping layer is demonstrated for the first time. An ultrathin La2O3 layer is inserted in the middle of a Si3N4 layer, followed by high-temperature annealing to mix the two layers. The La2O3-doped Si 3N4 layer, irrespective of Si3N4 deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La2O3 layer thickness and position in the Si3N4 trapping layer has been also systematically studied.",

keywords = "Charge-trap Flash memory, TaN/AlN/SiO/Si (TANOS), lanthanum oxide, nitride, retention, trapping energy level",

author = "Park, \{Jong Kyung\} and Youngmin Park and Lee, \{Seok Hee\} and Im, \{Sung Kyu\} and Oh, \{Jae Sub\} and Joo, \{Moon Sig\} and Kwon Hong and Cho, \{Byung Jin\}",

year = "2011",

month = oct,

doi = "10.1109/TED.2011.2161993",

language = "English",

volume = "58",

pages = "3314--3320",

journal = "IEEE Transactions on Electron Devices",

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T1 - Lanthanum-oxide-doped nitride charge-trap layer for a TANOS memory device

AU - Park, Jong Kyung

AU - Park, Youngmin

AU - Lee, Seok Hee

AU - Im, Sung Kyu

AU - Oh, Jae Sub

AU - Joo, Moon Sig

AU - Hong, Kwon

AU - Cho, Byung Jin

PY - 2011/10

Y1 - 2011/10

N2 - A charge-trap-type Flash memory with a La2O3-doped Si3N4 charge-trapping layer is demonstrated for the first time. An ultrathin La2O3 layer is inserted in the middle of a Si3N4 layer, followed by high-temperature annealing to mix the two layers. The La2O3-doped Si 3N4 layer, irrespective of Si3N4 deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La2O3 layer thickness and position in the Si3N4 trapping layer has been also systematically studied.

AB - A charge-trap-type Flash memory with a La2O3-doped Si3N4 charge-trapping layer is demonstrated for the first time. An ultrathin La2O3 layer is inserted in the middle of a Si3N4 layer, followed by high-temperature annealing to mix the two layers. The La2O3-doped Si 3N4 layer, irrespective of Si3N4 deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La2O3 layer thickness and position in the Si3N4 trapping layer has been also systematically studied.

KW - Charge-trap Flash memory

KW - TaN/AlN/SiO/Si (TANOS)

KW - lanthanum oxide

KW - nitride

KW - retention

KW - trapping energy level

UR - https://www.scopus.com/pages/publications/80053199064

U2 - 10.1109/TED.2011.2161993

DO - 10.1109/TED.2011.2161993

M3 - Article

AN - SCOPUS:80053199064

SN - 0018-9383

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JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 10

M1 - 5983430

ER -

Lanthanum-oxide-doped nitride charge-trap layer for a TANOS memory device

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Keywords

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