Live demonstration: An FPGA based hardware compression accelerator for Hadoop system

Sang Muk Lee, Jung Hwan Oh, Ji Hoon Jang, Seong Mo Lee, Ji Kwang Kim, Seung Eun Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Hadoop is an emerging data application for the big data processing. In Hadoop system, data compression is a significant part in processing big data effectively. Achieving this in software requires significant compute processing. In this paper we present the detailed design of a hardware compression accelerators. We also measure the performance of the hardware accelerators. Our analysis shows that hardware acceleration has the potential to improve the data compression by as much as 12x. As a result, our hardware accelerator provides a real time data processing of big data.

Original languageEnglish
Title of host publication2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages744-745
Number of pages2
ISBN (Electronic)9781509015702
DOIs
StatePublished - 3 Jan 2017
Event2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of
Duration: 25 Oct 201628 Oct 2016

Publication series

Name2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

Conference

Conference2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
Country/TerritoryKorea, Republic of
CityJeju
Period25/10/1628/10/16

Keywords

  • Compression
  • FPGA
  • Hardware Accelerator

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